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Espressif Systems /ESP32-C6 /GPIO /PIN9

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Interpret as PIN9

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SYNC2_BYPASS 0 (PAD_DRIVER)PAD_DRIVER 0SYNC1_BYPASS 0INT_TYPE 0 (WAKEUP_ENABLE)WAKEUP_ENABLE 0CONFIG 0INT_ENA

Description

GPIO pin configuration register

Fields

SYNC2_BYPASS

set GPIO input_sync2 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge.
PAD_DRIVER

set this bit to select pad driver. 1:open-drain. 0:normal.
SYNC1_BYPASS

set GPIO input_sync1 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge.
INT_TYPE

set this value to choose interrupt mode. 0:disable GPIO interrupt. 1:trigger at posedge. 2:trigger at negedge. 3:trigger at any edge. 4:valid at low level. 5:valid at high level
WAKEUP_ENABLE

set this bit to enable GPIO wakeup.(can only wakeup CPU from Light-sleep Mode)
CONFIG

reserved
INT_ENA

set bit 13 to enable CPU interrupt. set bit 14 to enable CPU(not shielded) interrupt.

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data